中文摘要：

为解决软件实现神经网络存在并行度不高、速度慢的缺点以及传统神经网络硬件设计资源利用高、网络训练不可控的不足，提出了一种新的BP神经网络FPGA设计方法。该方法通过基于对称性的分段线性拟合和非线性拟合实现Sigmoid激励函数和利用有限状态机实现基于误差的训练次数自适应。应用Verilog HDL语言设计1.3.1三层BP神经网络逼近y = cos x 函数，网络的资源占用为2 756 LEs，训练次数为1 583次，网络测试样本的平均相对误差为0.6%，最高时钟频率为82.3 MHz。验证结果表明该方法设计的神经网络资源占用少，网络训练可自动控制，同时还具有精度高，运行速度快的优点。

英文摘要：

Using software for neural network has the disadvantages of low parallelism and slow speed,the hardware designresource utilization of the traditional neural network is high,and the network training is uncontrollable. To solve these prob?lems,a new FPGA?based design method of back propagation(BP)neural network is proposed. The method can realize the Sig?moid excitation function through piecewise linear fitting and nonlinear fitting based on symmetry,and uses the finite state ma?chine(FSM)to accomplish the training times adaption based on error. The Verilog HDL language is used to design the 1?3?1BP neural network to approximate the function y = cos x. The resource occupancy of the network is 2 756 LEs,the trainingtimes are 1 583,the average relative error of the network test sample is 0.6%,and the maximum clock frequency is 82.3 MHz.The verification results show that the neural network designed with the method has the advantages of less resource occupancy,high accuracy and fast running speed,and can control the network training automatically.