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一种新型的高性能鉴频鉴相器
  • 期刊名称:微电子学与计算机,2006.23(7):43-49
  • 时间:0
  • 分类:TN432[电子电信—微电子学与固体电子学]
  • 作者机构:[1]武汉大学电气工程学院,湖北武汉430072, [2]北京微电子研究所,北京100076
  • 相关基金:国家自然科学基金项目(59977016)
  • 相关项目:多端口归一化模拟单元电路导出与实现方法研究
中文摘要:

文章在常用的几种数字PFD的性能缺陷分析基础上,通过对原有鉴频鉴相器的电路结构进行重新设计,提出了一种新型的无“过充”的预充式边沿触发的鉴频鉴相器,该电路可以实现鉴相性能无“死区”,具有优良的鉴频鉴相线性度和较高的鉴频鉴相灵敏度,电路结构相对简单。电路设计基于1^#SILICON 2.5V 0.25μmCMOS工艺。用Hspice对电路进行仿真,结果显示电路可以工作在1GHz以上频率的应用环境下。相比已有的几种常用鉴频鉴相器,该电路综合性能优越。

英文摘要:

In this paper, on the basis of the analysis of the defects of several typical digital PFDs, with the reform of architecture of.them, a novel edge-triggered precharged PFD is proposed, which is designed to prevent it's output signal's period is excessive. The novel PFD's phase characteristic has no "dead zone", and it is of high phase and frequency sensitivity, good linearization; what's more, its structure is simpler. The design is based on 1^# SILICON 2.5V 0.2.Sum technology. Simulation results of the circuit with HSPICE show a better performance, even if it operates at 1GHz. In brief, the novel PFD has better overall performance compared with the typical PFDs.

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