中文摘要：

硅基集成波导滤波器通孔的显微结构和阵列精度对硅基集成波导滤波器的电磁性能和可靠性至关重要。采用 KOH 溶液刻蚀、皮秒紫外激光刻蚀以及感应耦合等离子体刻蚀3种方法在晶向为[100]的高阻硅单晶衬底上加工了通孔阵列，并采用线宽测量仪和扫描电镜对通孔尺寸、阵列精度以及通孔侧壁的显微结构进行了表征，对比研究了不同深刻蚀方法对硅基集成波导滤波器通孔侧壁显微结构的影响。结果表明，采用感应耦合等离子体刻蚀方法得到的硅基集成波导滤波器通孔阵列的显微结构最佳，精度最高，且通孔侧壁的粗糙度最低。由此可见，在目前工艺设备和技术水平的情况下，感应耦合等离子体刻蚀是最适合加工高性能、高精度和高可靠性硅基集成波导滤波器通孔阵列的方法。

英文摘要：

The microstructure and the array accuracy of the etched vias of the silicon‐basedsubstrate integrated waveguide filter （ SIWF） are crucial to the electromagnetic performance and the reliability of the silicon‐based SIWF . In this paper , three different etching methods , including potassiumhydroxide etching , picosecond UV laser etching , and inductively coupled plasma （ ICP） etching are utilized to etch via arrays onhigh resistivity [100]‐siliconsubstrates . The profiles and the array accuracy of the vias are measured by optical critical dimension and the micromorphology of the vias is characterized byscanning electron microscopy （ SEM ） , on the basis of which the effects of different deep etching methods on the microstructure of the viasidewall of the silicon‐based SIWF are studied . The results indicate that the microstructure of the vias etched by the inductively coupled plasma etching method is the best . Meanwhile , this kind of vias has the highest array accuracy and the lowest roughness . So , under the current condition of process equipment and technical level , ICP etching is the optimal method for manufacturing deep via arrays of the silicon‐based SIWF .