中文摘要：

In order to realize accurate bilinear transformation from s- to z-domain,a novelswitched-capacitor configuration is proposed in the light of principles of dual-rate sampling and chargeconservation,which has also been used for building a 5th-order elliptic lowpass filter.The filter issimulated and measured in typical 0.34 μm/3.3 V Si CMOS process models,special full differentialoperational amplifiers and CMOS transfer gate switches,which achieves 80 MHz sampling rate,17.8MHz cutoff frequency,0.052 dB maximum passband ripple,42.1 dB minimum stopband attenuation and74 mW quiescent power dissipation.At the same time,the dual-rate sampling topology breaks thetraditional restrictions of filter introduced by unit-gain bandwidth and slew rate of operational amplifiersand also improves effectively their performances in high-frequency applications.It has been applied forthe design of an anti-alias filter in analog front-end of video decoder IC with 15 MHz signal frequencyyet.