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Experimental and theoretical study of an improved breakdown voltage SOI LDMOS with a reduced cell pitch*
  • ISSN号:1674-4926
  • 期刊名称:《半导体学报:英文版》
  • 时间:0
  • 分类:TN386.1[电子电信—物理电子学] TN432[电子电信—微电子学与固体电子学]
  • 作者机构:[1]Science and Technology on Analog Integrated Circuit Laboratory, Chongqing 400060, China, [2]State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology ofChina, Chengdu 610054, China
  • 相关基金:Projects supported by the National Natural Science Foundation of China (No. 61176069), and the Special Financial Gnants from the China Postdoctoral Science Foundation and Chongqing (Nos. 2012T50771, XM2012004).
中文摘要:

An improved breakdown voltage(BV) SOI power MOSFET with a reduced cell pitch is proposed and fabricated. Its breakdown characteristics are investigated numerically and experimentally. The MOSFET features dual trenches(DTMOS),an oxide trench between the source and drain regions,and a trench gate extended to the buried oxide(BOX). The proposed device has three merits. First,the oxide trench increases the electric field strength in the x-direction due to the lower permittivity of oxide( εox) than that of Si(εSi). Furthermore,the trench gate,the oxide trench,and the BOX cause multi-directional depletion,improving the electric field distribution and enhancing the RESURF(reduced surface field) effect. Both increase the BV. Second,the oxide trench folds the drift region along the y-direction and thus reduces the cell pitch. Third,the trench gate not only reduces the on-resistance,but also acts as a field plate to improve the BV. Additionally,the trench gate achieves the isolation between high-voltage devices and the low voltage CMOS devices in a high-voltage integrated circuit(HVIC),effectively saving the chip area and simplifying the isolation process. An 180 V prototype DTMOS with its applied drive IC is fabricated to verify the mechanism.

英文摘要:

An improved breakdown voltage (BV) SOI power MOSFET with a reduced cell pitch is proposed and fabricated. Its breakdown characteristics are investigated numerically and experimentally. The MOSFET features dual trenches (DTMOS), an oxide trench between the source and drain regions, and a trench gate extended to the buried oxide (BOX). The proposed device has three merits. First, the oxide trench increases the electric field strength in the x-direction due to the lower permittivity of oxide (eox) than that of Si (esi). Furthermore, the trench gate, the oxide trench, and the BOX cause multi-directional depletion, improving the electric field distribution and enhancing the RESURF (reduced surface field) effect. Both increase the BV. Second, the oxide trench folds the drift region along the y-direction and thus reduces the cell pitch. Third, the trench gate not only reduces the on-resistance, but also acts as a field plate to improve the BV. Additionally, the trench gate achieves the isolation between high-voltage devices and the low voltage CMOS devices in a high-voltage integrated circuit (HVIC), effectively saving the chip area and simplifying the isolation process. An 180 V prototype DTMOS with its applied drive IC is fabricated to verify the mechanism.

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期刊信息
  • 《半导体学报:英文版》
  • 中国科技核心期刊
  • 主管单位:中国科学院
  • 主办单位:中国电子学会 中国科学院半导体研究所
  • 主编:李树深
  • 地址:北京912信箱
  • 邮编:100083
  • 邮箱:cjs@semi.ac.cn
  • 电话:010-82304277
  • 国际标准刊号:ISSN:1674-4926
  • 国内统一刊号:ISSN:11-5781/TN
  • 邮发代号:2-184
  • 获奖情况:
  • 90年获中科院优秀期刊二等奖,92年获国家科委、中共中央宣传部和国家新闻出版署...,97年国家科委、中共中央中宣传部和国家新出版署三等奖,中国期刊方阵“双效”期刊
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  • 被引量:7754