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层次式FPGA快速可布性布线算法
  • 期刊名称:计算机辅助设计与图形学学报
  • 时间:0
  • 页码:682-687
  • 语言:中文
  • 分类:TP391.72[自动化与计算机技术—计算机应用技术;自动化与计算机技术—计算机科学与技术]
  • 作者机构:[1]清华大学计算机科学与技术系,北京100084, [2]清华信息科学与技术国家实验室(筹),北京100084
  • 相关基金:国家自然科学基金(60833004,60876026)
  • 相关项目:高可靠低功耗片上时钟设计与优化算法
中文摘要:

提出了一种针对层次式结构FPGA的快速拆线重布布线算法.利用历史拆线信息衡量拆线区域的可布性、可重布性及拆线影响力,形成独特的资源竞争解决机制;在禁忌搜索框架下选取禁忌拆线点、拆线路径与拆线线网,并在禁忌策略的指导下解决资源冲突,提高拆线有效性与速度.文中算法分为初始布线阶段与拆线重布2个阶段.在布线过程中,针对层次式结构引入简洁实用的布线线序.实验结果表明,恢算法中的拆线机制可以有效地减少拆线数目,显著提高了运行速度.

英文摘要:

By using historical information of congestions to evaluate the routability and reroutability in congestion area and the influence of rip up, the algorithm proposes another mechanism to resolve resource competition problem. Tabu nodes, rip-up nets and reroute paths are selected under the framework of tabu search, and relative strategies are applied to implement the mechanism, which simultaneously enhance the speed and the effectiveness of ripping up. The algorithm consists of two stages: initial routing process, rip-up and reroute process, during which it proposes an effective but simple scheme of routing. Experimental results show the effectiveness of our algorithm on reduction of rip-up nets and a notable enhancement on running speed, compared with PathFinder.

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