中文摘要：

实验评估了“混沌”在商业化IC实现工具Dc应用中的特性表现。方法是故意输入原本可以忽略不计的输入参数（自变量）扰动，记录与观察输出参数（因变量）质量的差异。统计实验结果，寻找输入自变量及输出因变量之间的非线性联系。基本结果是典型混沌现象的数量关系有如最坏的时序余量WNS（ns）与时钟微扰ClockCycleNoise（ps）显现非线性函数关系（存在劣解或优值）；关键结论是小输入扰动下在DE中运行同一电路多批（大于等于3），方便得到高质量的解决方案（基于TSMC65nm工艺）。

英文摘要：

This paper evaluates ＂chaos＂ characteristics of DC applications in IC implementation tools. The approach is deliberately to input parameters disturbance （ independent variables ）, which micro value could be negligible, and then to record and observe the output parameters＇ differences （ dependent variable ）. So we can find results as nonlinear relationships between the input arguments and output variables. The basic conclusion is that the data relationships of the typical chaotic phenomena like worst negative slack WNS （ ns ） as nonlinear f （ Clock Cycle ） （ps）, and there are inferior solutions and excellent values.The key conclusion is that running the same circuit multiple groups （ more than 3 in 10 times per group ） in small input perturbation can facilitate high-quality solutions for DC use in TSMC65nm.