中文摘要：

采用双向区域重叠组合法，基于三维层次式块边界元法实现了芯片级的互连电容提取．该方法将芯片切分为大量小规模区域。用全局场求解器计算各子区域电容矩阵，可方便地组合出整个芯片的电容矩阵；同时分析了其计算量和精度，并进行了并行计算实验．对实际版图结构的数值实验验证了有关分析结论，表明该方法高效、可靠、并行性能好．

英文摘要：

A two direction overlap-combination method is adopted to implement the chip-level capacitance extraction while using the 3D hierarchical block boundary element method as field solver. The proposed method cuts a chip into a great deal of small-scale regions, and then combines the capacitance matrices for all regions to get the full capacitance matrix. The computational accuracy and speed of the overlap-combination method are also analyzed, and parallel experiments were carried out. Numerical experiments with actual layout structures show that the proposed method is effective, reliable and with high parallelity.