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Deteriorated radiation effects impact on the characteristics of MOS transistors with multi-finger co
ISSN号:0026-2714
期刊名称:Microelectronics Reliability
时间:0
页码:1094-1097
语言:英文
相关项目:集成电路工艺研究(包括CAM)
作者:
Wang, Jian|Pei, Yunpeng|Xue, Shoubin|Wang, YangYuan|Wang, Wenhua|Huang, Ru|Fan, Chunhui|Wang, Xin'an|
同期刊论文项目
集成电路工艺研究(包括CAM)
期刊论文 55
会议论文 53
获奖 2
专利 35
同项目期刊论文
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Random telegraph signal noise in gate-all-around silicon nanowire transistors featuring Coulomb-bloc
Investigations on the physical limitation and electrostatic improvement of a gate-all-around silicon
Challenges of 22 nm and beyond CMOS technology
A model for radiation-induced off-state leakage current in N-channel metal-oxide-semiconductor trans
Effective crosstalk isolation with post-CMOS selectively grown porous silicon technique for radio fr
A comparative study on analog/RF performance of UTB GOI and SOI devices
A low-voltage flash memory cell utilizing the gate-injection program/erase method with a recessed ch
Characteristics and fluctuation of negative bias temperature instability in Si nanowire field-effect
Investigation of Different Strain Configurations in Gate-All-Around Silicon Nanowire Transistor
Novel Thermally Stable Single-Component Organic-Memory Cell Based on Oxotitanium Phthalocyanine Mate
Investigation of the off-state behavior in deep-submicron NMOSFETs under heavy ion irradiation by 3D
High-Performance Si Nanowire Transistors on Fully Si Bulk Substrate From Top-Down Approach: Simulati
Characteristics of Gate Current Random Telegraph Signal Noise in SiON/HfO2/TaN p-Type Metal-Oxide-Se
High Density Capacitorless Dynamic Random Access Memory Cell with Quasi Silicon-on-Insulator Structu
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Performance improvement of the EEPROM cells with the standard logic process featuring a metal finger
Negative-bias temperature instability in gate-all-around silicon nanowire MOSFETs: Characteristic mo
Top-down fabrication of shape controllable Si nanowires based on conventional CMOS process
Low-field mobility and carrier transport mechanism transition in nanoscale MOSFETs
Fabrication of 32 nm vertical nMOSFETs with asymmetric graded lightly doped drain structure
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Experimental Investigations on Carrier Transport in Si Nanowire Transistors: Ballistic Efficiency an
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Tradeoff between speed and static power dissipation of ultra-thin body SOI MOSFETs
Corner effects in double-gate/gate-all-around MOSFETs
High-performance integrated inductor and effective crosstalk isolation using post-CMOS selective gro
The localized-SOI MOSFET as. a candidate for Analog/RF applications
Two-bit memory devices based on single-wall carbon nanotubes: demonstration and mechanism
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High-Q Integrated Inductor Using Post-CMOS Selective Grown Porous Silicon (SGPS) Technique for RFIC
A Novel Dual-Doping Floating-Gate (DDFG) Flash Memory Featuring Low Power and High Reliability Appli
A 0.4-V Low Noise Amplifier Using Forward Body Bias Technology for 5 GHz Application
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Analog/RF Performance of Si Nanowire MOSFETs and the Impact of Process Variation
Simulation of plasma doping process by using the localized molecular dynamics method
A CMOS-compatible silicon substrate optimization technique and its application in radio frequency crosstalk isolation