中文摘要：

针对半导体晶圆制造系统缩短制造周期（CT）和提高产出率（TH）两个目标，考虑了瓶颈设备偏离其正常和可预测处理时间的情况（即瓶颈设备处理时间波动），结合CONWIP投料规则和G／G／m排队网络模型，开发了一种确定半导体晶圆制造系统中合理在制品（WIP）水平的启发式算法．仿真实验结果表明，在系统中保持该算法所计算出的WIP水平，在一定的瓶颈设备处理时间波动范围内可以取得合理的TH和CT．

英文摘要：

The minimization of cycle time （CT） and the maximization of throughput rate （TH） are the primary goals of semiconductor wafer manufacturing systems. A heuristic algorithm based on the CONWIP release control policy and G/G/m queueing network model was developed. The algorithm aims at caleulating a suitable work-in-process （WIP） level in a semiconductor wafer manufacturing system, and considers the factors that cause the bottleneck machines to depart from regular, predictable process time （bottleneck machines＇ process time variability）. The results of simulation experiments indicate that, fixing the WIP level calculated by the proposed algorithm in the system can achieve a good combination of CT and TH within a certain scope of bottleneck machines＇ process time variability.