为了提高数字γ谱仪的能谱分辨率,研究了梯形成形滤波算法。在MATLAB/Simulink开发环境下,采用系统模型开发工具System Generator,完成了核脉冲信号数字化梯形滤波算法的建模,并采用Xilinx公司的ISE开发工具对系统模型自动生成硬件代码(HDL代码)和硬件测试代码进行硬件仿真,验证了硬件代码其正确性。该方法大大简化了FPGA的开发流程,降低了FPGA的开发难度。
In order to improve the distinguishability of energy spectrum, we study a trapezoidal method of digital signal. This paper adopted the MATLAB or Simulink development environment and the tool of System Generator to achieve a model of digital trapezoidal signal. And automatic come to HDL code and hardware test code. In the end, we adopted ISE development environment of company to test the conclusion of HDL hardware code. By this, we can reduce the process and difficulty in the FPGA development cycle.