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中文摘要：
讨论分析了混合信号集成电路衬底噪声耦合的机理，及对模拟电路性能的影响。提出了一种混合信号集成电路衬底耦合噪声分析方法，基于TSMC0．35μm2P4M CMOS工艺，以14位高速电流舵D／A转换器为例，给出了混合信号集成电路衬底耦合噪声分析方法的仿真结果，并与实际测试结果进行比较，证实了分析方法的可信性。
英文摘要：
Based on the analysis of substrate noise generated by digital circuits, the effects of substrate noise on analog circuits in a mixed-signal chip are described and analyzed. A methodology to accurately and efficiently analyze the substrate noise coupling is presented. Based on the TSMC 0. 35 μm 2P4M CMOS process, the effects of substrate noise on 14-bit high-speed currentsteering D/A converter are studied through the comparing the test frequency results and simulated frequency. The proposed methodology for substrate noise analysis has been verified.
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