这篇文章检验危险驱动在软件和密码的算法的硬件实现之间的分析攻击。包括一个 Atmel 89S8252 8位处理器和 0.25 m 的代表性的平台 1.8 v 标准房间电路被建议实现进展加密标准(AES ) 。基于模拟的试验性的环境被造获得力量数据,和单个小点的微分力量分析(DPA ) ,并且多小点 DPA 和关联驱动分析(CPA ) 攻击分别地在二实现上被进行。试验性的结果证明硬件实现让更少的数据依赖者驱动漏抵抗力量攻击。而且,一条改进 DPA 途径被建议。它作为力量模型采用中间的结果的 hamming 距离并且安排纯文本输入区分力量踪迹到最大的概率。与原来的力量攻击相比,我们的改进 DPA 与可接受的力量大小和更少计算在 AES 硬件实现上执行成功的攻击。
This article examines vulnerabilities to power analysis attacks between software and hardware implementations of cryptographic algorithms. Representative platforms including an Atmel 89S8252 8-bit processor and a 0.25 um 1.8 v standard cell circuit are proposed to implement the advance encryption standard (AES). A simulation-based experimental environment is built to acquire power data, and single-bit differential power analysis (DPA), and multi-bit DPA and correlation power analysis (CPA) attacks are conducted on two implementations respectively. The experimental results show that the hardware implementation has less data-dependent power leakages to resist power attacks. Furthermore, an improved DPA approach is proposed. It adopts hamming distance of intermediate results as power model and arranges plaintext inputs to differentiate power traces to the maximal probability. Compared with the original power attacks, our improved DPA performs a successful attack on AES hardware implementations with acceptable power measurements and fewer computations.