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Power optimization and performance improvement for embedded Ethernet SOC
  • ISSN号:1005-8885
  • 期刊名称:《中国邮电高校学报:英文版》
  • 时间:0
  • 分类:TN4[电子电信—微电子学与固体电子学] TP393[自动化与计算机技术—计算机应用技术;自动化与计算机技术—计算机科学与技术]
  • 作者机构:[1]Research Center for VLSI and Systems, Huazhong University of Science andTechnology, Wuhan 430074, China, [2]School of Electric and information Engineering, Wuhan Institute ofTechnology, Wuhan 430074, China
  • 相关基金:Acknowledgements This work is supported by the Hi-Tech Research and Development Program of China (2006AA01Z226).
中文摘要:

信息器具是传统的家器具和因特网技术的联合。在这篇文章,信息器具的一个以太网控制器 system-on-chip (SOC ) 解决方案被介绍。完成高效,嵌入 8 位 8051 微控制单位(MCU ) 被一根独立指令总线和一根数据总线优化。而且,一个二阶段的管道特征被增加。与存在相比 8051 核心,提高的一个周期 MCU 在说明实行效率提供十次改进。平均数 -- 当时,媒介的性能存取控制(MAC ) 电路被采用象直接存储器存取(直接存储器存取) 那样的各种各样的技术极大地改进控制,寻呼策略,等等。为了减少电源消费,钟 gating,低电源供应,和 multi-working-clock,被采用。而且,在不同的钟频率电路完成快速的数据通讯,一个简单乒乓球第一在第一外面(FIFO ) 电路被认识到。薄片用 TSMC 0.25 m 被实现 two-poly 四金属的混合信号互补金属氧化物半导体(互补金属氧化物半导体) 技术。它的 die 区域是 4.8mm ???????????  ??????????????????????????????????????|

英文摘要:

Information appliance is the combination of traditional home appliances and the internet technology. In this article, an Ethernet controller system-on-chip (SOC) solution for information appliances is presented. To achieve high performance, the embedded 8 bits 8051 micro control unit (MCU) is optimized by an independent instruction bus and a data bus. Besides, a two-stage pipeline feature is added. Compared with the existing 8051 core, the enhanced one-cycle MCU offers ten times improvement in instruction execution efficiency. Meanwhile, the performance of media access control (MAC) circuit is greatly improved by adopting various techniques such as direct memory access (DMA) control, paging strategy, etc. To reduce the power consumption, clock gating, low power supply, and multi-working-clock are adopted. Moreover, to achieve rapid data communication in different clock frequency circuits, a simple ping-pong first in first out (FIFO) circuit is realized. The chip is implemented using TSMC 0.25 μm two-poly four-metal mixed signal complementary metal oxide semiconductor (CMOS) technology. Its die area is 4.8 min× 4.6 mm. The test results show that the maximum throughput of Ethernet packets can reach 7 Mb/s while the power consumption is rather low-the working current is just about 200 mA.

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期刊信息
  • 《中国邮电高校学报:英文版》
  • 主管单位:高教部
  • 主办单位:北京邮电大学、南邮、重邮、西邮、长邮、石邮
  • 主编:LU Yinghua
  • 地址:北京231信箱(中国邮电大学)
  • 邮编:100704
  • 邮箱:jchupt@bupt.edu.cn
  • 电话:010-62282493
  • 国际标准刊号:ISSN:1005-8885
  • 国内统一刊号:ISSN:11-3486/TN
  • 邮发代号:2-629
  • 获奖情况:
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  • 被引量:127