为了研究高介电常数(高k)栅介质材料异质栅中绝缘衬底上的硅和金属-氧化物-硅场效应晶体管的短沟道效应,为新结构器件建立了全耗尽条件下表面势和阈值电压的二维解析模型.模型中考虑了各种主要因素的影响,包括不同介电常数材料的影响,栅金属长度及其功函数变化的影响,不同漏电压对短沟道效应的影响.结果表明,沟道表面势中引入了阶梯分布,因此源端电场较强;同时漏电压引起的电势变化可以被屏蔽,抑制短沟道效应.栅介电常数增大,也可以较好的抑制短沟道效应.解析模型与数值模拟软件ISE所得结果高度吻合.
A 2-D analytical model for the surface potential and threshold voltage in fully depleted dual-material gate(DMG) SOI MOSFETs with high-k dielectric is developed to investigate the short-channel effects(SCEs). Our model takes into account the effects of the length of the gate metals and their work functions, the applied drain biase,and the gate dielectric constant. We demonstrate that the surface potential in the channel region exhibits a stepped potential variation by the gate near the drain, resulting in suppressed SCEs. With dielectric constants increasing, this novel device shows inverse SCEs. The derived analytical models are in good agreement with the resafts of the two-dimensional device simulator ISE.