随着VLSI设计规模的日益增大,对于电路的测试生成(Automatic Test Pattern Generation.ATPG)也有了新的要求。提出了一种基于遗传算法和蚂蚁算法融合的数字电路智能测试生成算法,克服了传统算法计算量大、需对电路逻辑有较深刻认识的缺陷,而且也避免了以往的遗传算法和蚂蚁算法容易陷入局部最优的不足。研究表明这种算法效果较同类其他算法好,而且在大规模电路中尤能显示其特点。
The Automatic test Pattern Generation (ATPG) is more and more important as the scale of VLSI increases significantly. Here by combing Genetic Algorithm (GA) and Ant Algorithm (AA), a new method named GAAA is proposed for intelligent test generation for digital circuits, so that the local minimum in optimization can be avoided while the optimization speed is ensured. In a real CPU faults detection, our method is shows satisfactory.