采用磁控溅射方法,在Si衬底上制备HfTaON高五栅介质,研究了A10N、HfON、TaON不同界面层对MOS器件电特性的影响。结果表明,HfTa0N/AlON叠层栅介质结构由于在A10N界面层附近形成一种Hf—AI—O“熵稳定”的亚稳态结构,且AION具有较高的结晶温度、与Si接触有好的界面特性等,使制备的MoS器件表现出优良的电性能:低的界面态密度、低的栅极漏电、高的可靠性以及高的等效^值(21.2)。此外,N元素的加入可以抑制Hf和Ta的扩散,有效抑制界面态的产生,并使器件具有优良的抵抗高场应力的能力。
The HfTaON gate dielectric with different interface layers is deposited on Si wafer by co-sputtering method. The influences of different interlayers of AlON, TaON and HfON on the electrical properties of MOS device are investigated. The results indicate that the HfTaON/ AlON stack gate dielectric MOS device has excellent electrical performances, e.g. low interface- state density, low gate leakage current, high device reliability and large equivalent k value (21.2). These are probably attributed to formation of a metastable entropy-stabilized Hf-Al-O structure near the HfTaON/AlON interface, and also the AlON interlayer with high crystallization temperature and good interface properties with Si. In addition, diffusion of Hf and Ta could be blocked to a great extent by N incorporation, which effectively suppresses generation of interface states and gives an excellent immunity to high-field stressing.