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A New analytical model of high voltage SOI thin film devices
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  • 相关项目：单片功率系统集成（PSoC）的基础理论和技术研究
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单片功率系统集成（PSoC）的基础理论和技术研究
期刊论文 90
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Unified breakdown model of SOI RESURF device with uniform/ step/ linear doping profile
复合介质层SOI高压器件电场分布解析模型
New CMOS compatible super junction LDMOST with N-type buried layer
电荷非平衡super junction 结构电场分布
表面注入P-top区double RESURF功率器件表面电场模型
漂移区表面阶梯掺杂LDMOS的击穿电压模型
Boost变换器断续导通模式的PSM同步开关映射模型
不同调制模式下Boost变换器DCM模态的能量模型与稳定性分析
On-state breakdown model for high voltage RESRURF LDMOS
有n埋层结构的1200V横向变掺杂双RESURF LDMOS研制
局域寿命控制NPT-IGBT 瞬态模型
功率VDMOS器件的ESD瞬态模型
Output characteristics of n-buried-pSOI sandwiched rf power LDMOS
A novel double RESURF LDMOS and a versatile JFET device usedas internal power supply and current det
Analysis of back-gate effect on breakdown behaviour of over 600V SOI LDMOS transistors
SOI high-voltage device with step thickness sustained voltage layer
高散热变k介质埋层SOI高压功率器件
可变低k介质层SOI高压器件耐压特性
屏蔽槽SOI高压器件新结构和耐压机理
部分局域电荷槽SOI高压器件新结构
New lateral super junction mosfets with n+-floating layer on high-resistance substrate
A high voltage BCD process using thin epitaxial technology
New high voltage SOI device with variable-thickness drift region and its optimization
A novel 700-V SOI LDMOS with double-side trench
New thin-film power MOSFETs with a buried oxide double step structure
Realization of High Voltage (>700V) in New SOI Devices with a Compound Buried-Layer
A novel 1200-V LDMOSFET with floating buried layer in substrate
A novel high voltage LDMOS for HVIC with the multiple step shaped equipotential rings
A new SOI high voltage device with a step thickness drift region and its analytical model for the el
一种基于负载状态的分段式PSM调制模式
带P埋层表面注入硅基LDMOS模型与优化
在SOI基上设计实现D/A驱动的高压LDMOS开关电路
具有N+浮空层的体电场降低(Rebulf) LDMOS结构耐压分析
阶梯埋氧型SOI结构的耐压分析
具有P型埋PSOI结构的耐压分析
阶梯掺杂薄漂移区 RESURF LDMOS耐压模型
双面阶梯埋氧型SOI结构的耐压分析
具有p型埋层PSOI结构的耐压分析
n埋层PSOI结构射频功率LDMOS的输出特性
PSJ高压器件的优化设计
具有多等位环的高压屏蔽新结构MER-LDMOS耐压分析
1200V MR D-RESURF LDMOS与BCD兼容工艺研究
一种新型的低导通电阻折叠硅SOI LDMOS
High Voltage SOI SJ-LDMOS with a Non-depletion Compensation Layer
SOI基双极RESURF二维解析模型
Optimization of super-junction SOI-LDMOS with a step doping surface implanted layer
A 1.8-V 0.7 ppm℃ high order temperature-compensated CMOS current reference
A new analytical model for optimizing SOI LDMOS with step doped drift region
Longitudinal junction termination technique by multiple floating buried-layers for LDMOST
非均匀沟道MOS辐照正空间电荷迁移率模型
非均匀寿命分布电导调制基区中非平衡载流子的WKB解
Energy model and stability analysis of PSM converter in DCM
REBULF LDMOS实验结果及具有部分N浮空层结构的分析
具有非平面埋氧层的新型SOI材料的制备
具有高压互连线的多区双RESURF LDMOS击穿特性
单密勒电容补偿的三级误差运放电路
全耗尽型浮空埋层LDMOS的耐压特性
Boost变换器跨周期调制(PSM)的状态空间平均模型
背栅效应对SOI横向高压器件击穿特性的影响
An ultra-low specific on-resistance VDMOS with a step oxide-bypassed trench structure
双面阶梯埋氧层部分SOI高压器件新结构
New high-voltage (> 1200 V) MOSFET with the charge trenches on partial SOI
A new structure and its analytical model for the electric field and breakdown voltage of SOI high vo
A dual complex pole-zero cancellation frequency compensation with gain-enhanced stage for three-stag
Thermal analytic model of current gain for Bipolar Junction Transistor-Bipolar Static Induction Tran
A novel super-junction lateral double-diffused metal–oxide–semiconductor field effect transistor wit
An analytical model for the surface electrical field distribution and optimization of bulk-silicon d
Realizing high breakdown voltage SJ-LDMOS on bulk silicon using a partial n-buried layer
Influence of the minority carrier extracted by the base electrode on current gain of bipolar power t
基于耦合式电平位移结构的高压集成电路
New power lateral double diffused metal-oxide-semiconductor transistor with a folded accumulation la
A new partial SOI power device struture with P-type buried layer
断续导通模式Buck变换器离散解析模型
埋空隙PSOI结构的耐压分析
断续导通模式Buck变换器跨周期调制离散解析模型
An advanced monolithic digitalized random carrier frequency spread-spectrum clock generator for EMI suppression
智能型高压SENSFET器件的设计分析和实现
基于薄外延技术的高压BCD兼容工艺
非均匀厚度漂移区SOI高压器件及其优化设计
高阻衬底上具有n^＋浮空层的横向Super Junction MOSFETs
具有部分n埋层的高压SJ-LDMOS器件新结构
可变低κ介质层SOI LDMOS高压器件的耐压特性
一种自适应斜坡补偿电路
一种新的基于E-SIMOX衬底的PSOI高压器件
薄硅层阶梯埋氧PSOI高压器件新结构
A new structure and its analytical model for the vertical interface electric field of a partial-SOI high voltage device
A Novel Super-junction LDMOST Concept with Split p Columns