当CMOS器件特征尺寸缩小到45 nm以下,SiO_2作为栅介质材料已经无法满足性能和功耗的需要,用高k材料替代SiO_2是必然选择.然而,由于高k材料自身存在局限性,且与器件其他部分的兼容性差,产生了很多新的问题如界面特性差、阈值电压增大、迁移率降低等.本文简要回顾了高k栅介质在平面型硅基器件中应用存在的问题以及从材料、结构和工艺等方面采取的解决措施,重点介绍了高k材料在新型半导体器件中的应用,并展望了未来的发展趋势.
As the feature size of MOSFET scales beyond 45 nm, SiO2 as gate dielectric fails to meet the performance requirement because of the high gate oxide leakage current. It is necessary to replace Si02 with high-k materials. However, high-k materials as gate dielectric have some limitations and are not expectedly compatible with the conventional structure, inducing new challenges such as bad interfacial quality, increased threshold voltage, mobility degradation, etc. In this paper we review the problems encountered in the introduction of high-k gate dielectric into planar devices and the solutions in terms of material, device structure and process integration. Some novel applications of high-k materials in new devices and the future trend are also reviewed.