位置：成果数据库 > 期刊 > 期刊详情页
Ultra-low Specific On-Resistance High Voltage SOI Lateral MOSFET
  • 期刊名称：IEEE Electron Device Letters
  • 时间：0
  • 页码：185-187
  • 语言：英文
  • 相关项目：SOI高压器件荷致高场理论与新结构
作者： Florin Udrea|Xiaorong Luo|
同期刊论文项目
SOI高压器件荷致高场理论与新结构
期刊论文 34 会议论文 6 专利 7
同项目期刊论文
A new Short-Anoded IGBT with high emission efficiency
Low on-resistance SOI dual-trench-gate MOSFET
Partial SOI Power LDMOS With a Variable Low-k Dielectric Buried Layer and a Buried P Layer
Design of compound buried layer SOI high voltage device with double windows
Eliminating Back-Gate Bias Effects in a Novel SOI High-Voltage Device Structure
A new integrated SOI power device based on self-isolation technology
Numerical and Experimental Investigation on a Novel High-Voltage (> 600-V) SOI LDMOS in a Self-Is
A novel complementary N~+-charge island SOI high voltage device
A new SOI high voltage device based on E-SIMOX substrate
A new structure and its analytical model for the vertical interface electric field of a partial-SOI
A novel partial silicon on insulator high voltage LDMOS with low-k dielectric buried layer
Novel Low-k Dielectric Buried-Layer High-Voltage LDMOS on Partial SOI
Double gate lateral IGBT on partial membrane
Partial-SOI high voltage P-channel LDMOS with interface accumulation holes
Novel High-Voltage LDMOS Based on Self-adaptiveInterface Charge
A −188 V 7.2 Ω·mm2, P-channel high voltage device formed on an epitaxy-SIMOX subs
Ultra-low on-resistance high voltage (> 600 V) SOI MOSFET with a reduced cell pitch
Complementary Charge Islands Structure for High VoltageDevice of Partial-SOI
Compound buried layer SOI high voltage device with a step buried oxide
Realization of High Voltage (> 700 V) in New SOI Devices With a Compound Buried Layer
A new high voltage SOI LDMOS with triple RESURF structure
A new double gate SOI LDMOS with a step doping profile in the drift region
A High-Voltage LDMOS Compatible With High-Voltage Integrated Circuits on p-Type SOI Layer
Field Enhancement for Dielectric Layer of High-Voltage Devices on Silicon on Insulator
非均匀厚度漂移区SOI高压器件及其优化设计
一种新的基于E-SIMOX衬底的PSOI高压器件
Conductivity modulation enhanced lateral IGBT with SiO_2 shielded layer anode by SIMOX technology on SOI substrate
Complementary charge islands structure for a high voltage device of partial-SOI
Novel SOI double-gate MOSFET with a P-type buried layer
A novel partial silicon on insulator high voltage LDMOS with low-k dielectric buried layer
Ultra-low specific on-resistance SOI double-gate trench-type MOSFET
A new structure and its analytical model for the vertical interface electric field of a partial-SOI high voltage device