文章考虑了晶体管堆叠效应对串联晶体管的信号占空比和开关概率的影响,提出了一种更精确的正偏置温度不稳定性(positive bias temperature instability,PBTI)和热载流子注入(hot carrier injection,HCI)效应的老化模型,并引入综合考虑信号占空比和开关概率的W值,根据W值的大小对输入信号重排序,以减小PBTI和HCl效应引起的电路老化。结果表明:与Hspice仿真结果相比,原有模型的平均误差为3.9%,而文中所提模型的平均误差能减小到1.4%;利用W值排序法进行晶体管输入信号重排序,逻辑门的寿命平均提高11.7%。
In this paper, a brand new aging model of positive bias temperature instability(PBTI) and hot carrier injection(HCI) effect is proposed considering the stacking effect of transistors on the input signal probability and the switching activity of transistors in series. Then a W-value considering the input signal probability and the switching activity is defined and the W-value based input reordering approach is presented to co-mitigate PBTI and HCI induced circuit aging. The experimental results show that compared to the actual value -simulated by Hspiee, the average error of the previous model is 3. 9%, while the error of the proposed model can be reduced to 1.4% on average. The lifetime of logic gates can increase by 11.7% on average by using the proposed input reordering method.