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A Phase Change Memory Chip Based on Ti Sb Te Alloy in 40-nm Standard CMOS Technology
  • ISSN号:1009-5896
  • 期刊名称:《电子与信息学报》
  • 时间:0
  • 分类:TP333[自动化与计算机技术—计算机系统结构;自动化与计算机技术—计算机科学与技术]
  • 作者机构:State Key Laboratory of Functional Materials for Informatics,Shanghai Institute of Micro-system and Information Technology,Chinese Academy of Sciences, Semiconductor Manufacturing International Corporation
  • 相关基金:supported by the‘‘Strategic Priority Research Program’’of the Chinese Academy of Sciences(XDA09020402);National Key Basic Research Program of China(2013CBA01900,2010CB934300,2011CBA00607,2011CB932804);National Integrate Circuit Research Program of China(2009ZX02023-003);National Natural Science Foundation of China(61176122,61106001,61261160500,61376006);Science and Technology Council of Shanghai(12nm0503701,13DZ2295700,12QA1403900,13ZR1447200,14ZR1447500)
中文摘要:

In this letter, a phase change random access memory(PCRAM) chip based on Ti0.4Sb2Te3 alloy material was fabricated in a 40-nm 4-metal level complementary metal-oxide semiconductor(CMOS) technology. The phase change resistor was then integrated after CMOS logic fabrication. The PCRAM was successfully embedded without changing any logic device and process, in which 1.1 V negative-channel metal-oxide semiconductor device was used as the memory cell selector. The currents and the time of SET and RESET operations were found to be 0.2 and 0.5 m A, 100 and 10 ns,respectively. The high speed performance of this chip may highlight the design advantages in many embedded applications.

英文摘要:

In this letter, a phase change random access memory (PCRAM) chip based on Ti0.4Sb2Te3 alloy material was fabricated in a 40-nm 4-metal level complementary metal-oxide semiconductor (CMOS) technology. The phase change resistor was then integrated after CMOS logic fabrication. The PCRAM was successfully embedded without changing any logic device and process, in which 1.1 V negative-channel metal-oxide semiconductor device was used as the memory cell selector. The currents and the time of SET and RESET operations were found to be 0.2 and 0.5 mA, 100 and 10 ns, respectively. The high speed performance of this chip may highlight the design advantages in many embedded applications.

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期刊信息
  • 《电子与信息学报》
  • 中国科技核心期刊
  • 主管单位:中国科学院
  • 主办单位:中国科学院电子学研究所 国家自然科学基金委员会信息科学部
  • 主编:朱敏慧
  • 地址:北京市北四环西路19号
  • 邮编:100190
  • 邮箱:jeit@mail.ie.ac.cn
  • 电话:010-58887066
  • 国际标准刊号:ISSN:1009-5896
  • 国内统一刊号:ISSN:11-4494/TN
  • 邮发代号:2-179
  • 获奖情况:
  • 国内外数据库收录:
  • 荷兰文摘与引文数据库,美国工程索引,美国剑桥科学文摘,日本日本科学技术振兴机构数据库,中国中国科技核心期刊,中国北大核心期刊(2004版),中国北大核心期刊(2008版),中国北大核心期刊(2011版),中国北大核心期刊(2014版)
  • 被引量:24739