利用电化学方法在P型重掺杂单晶硅(100)基体上制备了多孔硅薄膜,通过质量计算法得到多孔硅的孔隙率,并研究了多孔硅孔隙率随腐蚀深度变化的规律。利用显微拉曼光谱技术对多孔硅纵切面上的残余应力进行了测量,结果表明,多孔硅的孔隙率随腐蚀时间/N度的增加有先增加后减少的趋势;多孔硅纵向上存在拉伸残余应力,拉伸应力的分布与纵切面上孔隙率的分布成正比,先增大,再减小;到达多孔硅与基体硅的界面处时,拉伸应力减小为零,靠近硅一侧,转变为压应力;残余应力的最大值出现在临近多孔硅表面以下的区域。这主要与多孔硅制备过程中孔内HF酸浓度的降低和硅/电解液表面的电偶层有关。
The porous silicon were prepared on highly doped p-type silicon(100) wafer using electrochemical etching. The porosity is determined gravimetrically by weight loss after anodization and stripping in dilute KOH solutions, and the relation of porosity and etching depth was studied, residual stress was measured by Micro-Raman spectroscopy along cross-section. The results show that the porosity of porous silicon increases firstly and then decreases with etching time/depth, the tensile residual stress along cross-section increases firstly, then decreases gradually to the regions near the interface between the porous silicon layers and the Si substrate. A compressive stress appears at the interlace near to the Si substrate. The tensile residual stress is proportional to porosity. The largest tensile stress appears on the area under surface of porous silicon. It is correlated with the reduction of HF concentration in the pore and a dipole layer at c-Si/electrolyte interface.