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考虑热电耦合效应的缓冲器插入功耗优化
  • 期刊名称:计算机辅助设计与图形学学报, 2009, 21(9): 1264-1269. (EI: 200940
  • 时间:0
  • 分类:TN405.97[电子电信—微电子学与固体电子学]
  • 作者机构:[1]西安电子科技大学微电子所宽禁带半导体材料与器件教育部重点实验室,西安710071
  • 相关基金:国家自然科学基金(60606006);国家杰出青年科学基金(607254i5);重点实验室基金(9140C030102060C0303).
  • 相关项目:集成电路设计(包括CAD)
中文摘要:

为了改善芯片的功耗和温度特性,提出了一种缓冲器插入功耗优化方法.该方法基于延时、功耗和温度三者之间的热电耦合效应,给出了相应的延时、功耗和热模型;通过在允许的范围内牺牲部分延时来优化功耗,并在优化过程兼顾温度对延时和功耗的影响以及互连电感效应对延时的影响,利用Matlab软件求得最佳优化结果.采用该方法针对65nm和45nm工艺节点的缓冲器插入进行分析和验证的结果表明了其有效性.文中同时指出忽略互连电感效应会低估芯片的优化稳态功耗和温度.

英文摘要:

To improve the power and temperature characteristics of IC, a power optimization method by repeater insertion is presented in this paper. It is based on the electro-thermal coupling among power, delay and temperature, includes delay model, power model and thermal model, and makes power consumption reduced by allowing a small delay penalty. The proposed method contains temperature impacts on delay and power, and takes inductance effect into consideration. The optimized results are gained by using Matlab software. Simulations for repeater insertion under 65 nm and 45 nm technology are carried out and the results show that the chip temperature and power optimized by the proposed method are decreased dramatically. In addition, this paper points out that absence of inductance effect leads to underestimate optimal temperature and power.

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